Chapter 30

Timing Analysis Using Bisection

To analyze circuit timing violations, a typical methodology is to generate a set of operational parameters that produce a failure in the required behavior of the circuit. Then when a circuit timing failure occurs, you can identify a timing constraint that can lead to a design guideline. You must be able to perform an iterative analysis to define the violation specification.

Typical types of timing constraint violations include:

• Data setup time before clock
• Data hold time after clock
• Minimum pulse width required to allow a signal to propagate to the output
• Maximum toggle frequency of the component(s)

This chapter describes how to use the Star-Hspice bisection function in timing optimization. The general topic of optimization with Star-Hspice is covered in depth in Statistical Analysis and Optimization.

The following topics are covered in this chapter:

• Understanding Bisection
• Understanding the Bisection Methodology
• Using Bisection
• Setup Time Analysis
• Minimum Pulse Width Analysis