The LEVEL 38 Cypress Depletion MOSFET model (Cypress Semiconductor Corporation) is a further development of the Star-Hspice LEVEL 5 model and features:
At the default parameter settings, the LEVEL 38 model is basically backwards-compatible with LEVEL 5 /ZENH=0.0, with the exception of the surface mobility degradation equation (see the discussion below). Refer to the documentation for LEVEL 5 for the underlying physics that forms the foundation for the Huang-Taylor construct.
In LEVEL 38, the temperature compensation for threshold is ASPEC-style, concurring with the default in LEVEL 5. This section introduces and documents model parameters unique to this depletion model and additional temperature compensation parameters.
LEVEL 38 allows the use of all Star-Hspice capacitance options (CAPOP). CAPOP=2 is the default setting for LEVEL 38. By setting CAPOP=6 (AMI capacitance model), LEVEL 38 capacitance calculations become identical to those of LEVEL 5.
The parameter ACM default (ACM=0 in LEVEL 38) invokes SPICE-style parasitics. ACM also can be set to 1 (ASPEC), or to 2 (Star-Hspice). All MOSFET models follow this convention.
Star-Hspice option SCALE can be used with the LEVEL 5 model. However, option SCALM cannot be used due to the difference in units. Option DERIV cannot be used.
The following parameters must be specified for MOS LEVEL 38: VTO (VT), TOX, UO (UB), FRC, ECV, and NSUB (DNB).
As with LEVEL 5, the Ids current is calculated according to three gate voltage regions:
The low gate voltage region dominated by the bulk channel.
The region defined by high gate voltage and low drain voltage. In the enhancement region, both channels are fully turned on.
The region with high gate and drain voltages, resulting in the surface region being partially turned on and the bulk region being fully turned on.
To better model depletion region operations, empirical fitting constants have been added to the original Huang-Taylor mechanism to account for the effects caused by nonuniform channel implants and also to make up for an oversight in the average capacitance construct
Body effect in LEVEL 38 is calculated in two regions
With sufficiently high (and negative) substrate bias (exceeding vsbc), the depletion region at the implanted channel-substrate junction reaches the Si-oxide interface. Under such circumstances, the free carriers can only accumulate at the interface (like in an enhancement device) and the body effect is determined by the bulk doping level.
Before reaching vsbc, and as long as the implant dose overwhelms the substrate doping level, the body effect of the depletion mode device is dominated by the deeply "buried" transistor due to the implant. The body effect coefficient 
is proportional to both the substrate doping and, to first order, the implant depth. In this model level, the "amplification" of the body effect due to deep implant is accounted for by an empirical parameter, BetaGam.
Model parameters that start with L or W represent geometric sensitivities. In the model equations, a quantity denoted by zX (X being the variable name) is determined by three model parameters: the large-and-wide channel case value X and length and width sensitivities LX and WX, according to zX=X+LX/Leff+WX/Weff. For example, the zero field surface mobility is given by
The LEVEL 38 model parameters follow.
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Model level selector. This parameter is set to 38 for this model. |
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This parameter is the same as LD, but if LDAC is included in the .MODEL statement, it replaces LD in the Leff calculation for AC gate capacitance. |
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Field reduction coefficient variation due to substrate bias. |
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The LEVEL 38 model equations follow.
vde >0The temperature dependence of the mobility terms assume the ordinary exponential form:
The continuity term at the body effect transition point is given by
The saturation voltage, threshold voltage, body effect transition voltage, and body effect coefficient 
are described in the following sections.
The model parameter VTO, often called the "pinch-off," is a zero-bias threshold voltage extrapolated from a large device operating in the depletion mode. The effective pinch-off threshold voltage, including the device size effects and the terminal voltages, is given by:
The effective 
, including small device size effects, is computed as follows:
for vsb>vsbc, and =g otherwise.
The body effect transition point is calculated as follows:
When vgs <= vth, the surface is inverted and a residual DC current exists. When vsb is large enough to make vth > vinth, then vth is used as the inversion threshold voltage.
In order to determine the residual current, vinth is inserted into the ids, vsat, and mobility equation in place of vgs (except for vgs in the exponential term of the subthreshold current). The inversion threshold voltage at a given vsb is vinth, which is computed as:
The saturation voltage vsat is determined by:
Star-Hspice modifies vsat to include carrier velocity saturation effect:
The surface mobility UB is dependent upon terminal voltages as follows:
The 
L is the channel length modulation effect, defined in the next section. Note that v
The channel length modulation effect is included by modifying the ids current as follows:
The 
L is in microns, assuming XJ is in microns and na1 is in cm
When device leakage currents become important for operation near or below the normal threshold voltage, the model considers the subthreshold characteristics. In the presence of surface states, the effective threshold voltage von is determined by:
-vde > 0
< 0+ LD=0.15u WD=0.2u $ for LEFF AND WEFF
+ CJ=0.3E-16 MJ=0.4 PB=0.8 JS=2.0E-17 $ INTRINSIC DIODE
+ BULK=98 $ DEFAULT NODE FOR SUBSTRATE
+ TCV=0.003 $ TEMPERATURE COEFFICIENT
+ UO=495 FRC= 0.020 FSB=5e-5 VFRC=-1e-4 BFRC=-0
+ LUO=-100 LFRC=.03 LFSB=-1e-5 LVFRC=-.002 LBFRC=-1e-3
+ WUO=-30 WFRC=-0.01 WFSB=5e-5 WVFRC=-0.00
+ WBFRC=-0.4e-3
+ BetaGam=0.9 LBetaGam=-.2 WBetaGam=.1
* OXIDE THICKNESS AND CAPACITANCE
Star-Hspice Manual - Release 2001.2 - June 2001
otherwise.
for vsb > vsbc; 0 otherwise.
Linear region
Saturation region
