Publications / Patents

Internal Technical Reports
http://wwwsc/mti/fduan/

 

Publications

Recent:

"Design and Use of Memory-Specific Test Structures to Ensure SRAM Yield and Manufacturability", ISQED'2003, pp119-124, F. Duan, R. Castagnetti, R. Venkatraman, O. Kobozeva, and S. Ramesh, LSI Logic Corporation, 2003 download pdf or http://ieeexplore.ieee.org/xpl/abs_free.jsp?arNumber=1194719 http://csdl.computer.org/comp/proceedings/isqed/2003/1881/00/18810119abs.htm or  http://www.sigda.org/Archives/ProceedingArchives/Compendiums/papers/2003/isqed03/pdffiles/2b_1.pdf

"High-Density and High-Performance 6T-SRAM for System-on-Chip in 130 nm CMOS Technology", W. Kong, R.Venkatraman, R. Castagnetti, F. Duan and S. Ramesh, VLSI Symposium, 2001. [PDF] High-Density and High-Performance 6T-SRAM for System-on-Chip in ...

Previous:

1. Franklin L. Duan, Dimitris E. Ioannou, Shankar P. Sinha, and Frederick T. Brady,  ¡§LDD Design Tradeoffs for Self Latch-Up and Hot Carrier Degradation Control in Accumulation Mode FD SOI MOSFET¡¦s¡¨, IEEE Transactions on Electron Devices, vol. 44, pp.972-977, 1997. http://ieeexplore.ieee.org/iel1/16/12670/00585553.pdf?isNumber=12670&prod=JNL&arnumber=585553&arSt=972&ared=977&arAuthor=Duan%2C+F.L.%3B+Sinha%2C+S.P.%3B+Ioannou%2C+D.E.%3B+Brady%2C+F.T.

2. F.L. Duan, X.Zhao, D.E. Ioannou, H.L. Hughes and S.T. Liu, ¡§Detrimental Edge Effects on the Floating Body Phenomena in SOI MOSFETs¡¨, Symposium of 192nd International Meeting of the Electrochemical Society, Inc., pp.239-245, 1997.

3. Franklin L. Duan and Dimitris E. Ioannou, ¡§Design and Analysis of a Novel Mixed Accumulation/Inversion Mode FD SOI MOSFET¡¨, 1997 IEEE International SOI Conference Proceedings, pp.100-101, 1997. http://ieeexplore.ieee.org/xpls/abs_all.jsp?isNumber=13782&prod=CNF&arnumber=634952&arSt=100&ared=101&arAuthor=Daun%2C+F.L.%3B+Ioannou%2C+D.E.&arNumber=634952&a_id0=634948&a_id1=634949&a_id2=634950&a_id3=634951&a_id4=634952&a_id5=634953&a_id6=634954&a_id7=634955&a_id8=634956&a_id9=634957&a_id10=634958&a_id11=634959&a_id12=634960&a_id13=634961&a_id14=634962&count=15

4. Franklin L. Duan, Dimitris E. Ioannou, Harold L. Hughes and Mike Liu, ¡§Channel Coupling Imposed Tradeoffs Between Hot Carrier Degradation and Single Transistor Latch-Up in FD SOI MOSFET¡¦s¡¨, IEEE International Reliability Physics Symposium, pp.194-202, 1998. http://intl.ieeexplore.ieee.org/xpl/abs_free.jsp?arNumber=670542

5. Duan, F.L.; Zhao, X.; Ioannou, D.E."Increased channel edge impact ionization in SOI MOSFET's and effects on device operation" SOI Conference, 1998. Proceedings., 1998 IEEE International , 5-8 Oct. 1998, Pages:171 - 172 [Abstract]   [PDF Full-Text (216KB)] 

6. Dimitris E. Ioannou, Franklin  L. Duan, Shankar P. Sinha, and Andrej Zaleski, ¡§Opposite-Channel-Based Injection (OCBI) of Hot-Carriers in SOI MOSFET¡¦s: Physics and Applications¡¨, IEEE Transaction on Electron Devices, vol.45, May 1998. http://ieeexplore.ieee.org/iel4/16/14610/00669576.pdf?isNumber=14610&arnumber=669576&prod=JNL&arSt=1147&ared=1154&arAuthor=Ioannou%2C+D.E.%3B+Duan%2C+F.L.%3B+Sinha%2C+S.P.%3B+Zaleski%2C+A.

7. D.E. Ioannou, F.L. Duan, and X. Zhao, ¡§SIMOX Substrate and MOSFET¡¦s for Enhanced Reliability and Performance¡¨, 1997 International Semiconductor Device Research Symposium, pp.627-630, 1997.

8. Dimitris E. Ioannou, Franklin L. Duan, Williams C. Jenkins, and Harold L. Hughes, ¡§Channel Coupling Imposed Tradeoffs on Fully-Depleted (FD) SOI MOSFET¡¦s¡¨, submitted to ESSDREC¡¦98.

9. X. Zhao F.L. Duan, A. Thanailakis, D.E. Ioannou, R.K. Lawrence, and H.L. Hughes, ¡§Hole Trap Investigation in Supplemental Oxygen SIMOX Wafers by Opposite Channel Based Charge Injection¡¨, 1997 IEEE International SOI Conference Proceedings, pp.116-117, 1997. [Abstract]   [PDF Full-Text (132KB)]

10. Shankar P. Sinha, Franklin L. Duan, Dimitris E. Ioannou, William C. Jenkins, and Harold L. Hughes, ¡§Time Dependence Power Laws of Hot Carrier Degradation in SOI MOSFET¡¦s¡¨, 1996 IEEE International SOI Conference Proceedings, pp.18-19, 1996.

11. S. P. Sinha, F.L. Duan, D.E. Ioannou, William C. Jenkins, Harold L. Hughes, and M.S. Liu, ¡§Hot Carrier Degradation of Fully Depleted SIMOX MOSFET¡¦s¡¨, Proceedings of the 7th International Symposium On Silicon-On-Insulator Technology and Devices, pp.324-329, 1996.

 

Patents:

  1. Reduced soft error rate (SER) construction for integrated circuit structures, issued 2002
  2. Single channel four transistor SRAM, issued, 2002
  3. A new method to detect random and systematic transistor degradation for transistor reliability evaluation in high-density memory -- filed
  4. A unique way to characterize the shared contact used in high-density SRAM cell design in SoC ¡V filed
  5. New methodology to measure many more transistors on the same test area ¡V filed

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Patents (filed and submitted)

Single Channel four transistor SRAM

Novel embedded SRAM and Logic structure for reducing soft error rate (SER)

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http://ite.gmu.edu/~lduan/resume.html