Job Description 12/1/2001
Responsible for process/device characterization of 28nm node foundry
technology and designing test structures to verify foundry design rules.
Design experiments, collect e-test data, and statistically analyze experimental
data to characterize the process
Interface with the foundry and Lattice design and product engineers to assist
with product optimization, characterization, qualification, yield analysis, and
correlation of yield to e-test.
Job Qualifications
B.S. (M.S or PhD. preferred) in Electrical Engineering or related field
5+ years of experience in technology development or process integration
including direct experience with transistor characterization and optimization.
Experience with bench testing and characterization equipment is also required.
Must be detail-oriented with good communication and teamwork skills.
- read resume carefully, where the most Q's will be from.
- questions to ask the company (testing equipement, testing ability, test area,
tape out, special wafers for wafer level, database to foundry, telephone conf
with foundry),
- knowlwdge database
- need, function, product, function analysis, system level design
(VHDL or Verlog) (chip), mudule (CPU, SRAM, Flash, FPGA, CGLD) , devices
(mostfet, metal, ro, gate, sram), process and technology,
two kinds of languages, to foundry and to desin community.
- to foundry: technology node, classical (tox, L, W, Vt, Id) and new techomology
(metal gate, highK, copper, low K, halo, strained silicon, , yield, et data,
doe, data of your need, data of the foundry typical (model (Id, Vt, Ileak, C),
reliability (hci, tddb, nbti), and drc )
- to design, model, design, rule, margin, FF SS, sensitivity, reliability, opc,
dft, dfm,
- interview attentions
- Sin #1: Not being properly prepared
- Asking questions shows interest.
- Sin #8: Not following up with a thank you note or telephone call
- Maintain eye contact with all interviewers.
IBM
Semiconductor Process Integration Engineering Prof https://jobs3.netmedia1.com/cp/job_summary.jsp?job_id=STG-0435672&st=6467
http://www.silabs.com/about/careers/Pages/search.aspx
Job Description: 12/28/2001
Summary: Responsible for understanding a wide variety of semiconductor process
technologies in wafer foundries and making them available to internal design
community. This person will bring products from the design stage to
qualification.
Essential Functions:
• Drives semiconductor process technology customization in wafer foundries to
meet internal design project requirements
• Interfaces with wafer foundries to provide specific characterizations data for
designs of digital, analog, and mixed-signal IC¨s
• Initiates and manages pilot and corner silicon for new products.
• Resolve on-going process and device related issues for yield, reliability, and
performance with foundries in co-ordination with design and product/test teams
• Conducts process technology comparisons among various wafer foundries.
• Monitors quality assurance/reliability and process/device control data at
wafer foundry
• Manages process transfer qualifications with a wafer foundry and process port
qualifications across two or more wafer foundries
• Helps circuit design/CAD engineers understand technology options, process
margin, design rules, device models, WLR, etc.
• Design and characterization of test structures to provide process technology
evaluations and recommendations
• Participates in the silicon debug for new product functionality and yield
issues
• Reviews product requirements with design staff to ensure compatibility of
processing methods.
• Other duties as required.
Required Education/Skills/Experience:
• 3-5 yrs experience with Semiconductor Foundries in Asia
• BSEE or equivalent
• Product Engineering or Device/Process engineering background
• Strong Communication and Documentation skills required
• Solid NVM experience (especially Embedded Flash) is a plus
ACC
www.austincc.edu/HongXiao/ch03.PDF
http://www5.austincc.edu/ehire/application/submit.php?
hotmail, luckyyou
